RCS4 Presentations

• RCS4 Intro (PDF, 1 MB) - Tom Conte and Elie Track, IEEE Rebooting Computing Co-Chairs
• Probabilistic and Approximate Computing (PDF, 651 KB) - Dr. Laura Monroe, Ultrascale Systems Research Center, High Performance Computing Division, Los Alamos National Laboratory
• Architecting for Causal Intelligence at Nanoscale (PDF, 3 MB) - Santosh Khasanvis, Senior Research Scientist, BlueRISC Inc., Amherst, MA
• Cryogenic Computing Complexity (C3) (PDF, 916 KB) - Marc Manheimer, IARPA
• Roadmap Benefits Past, Present and Future (PDF, 6 MB) - Paolo Gargini, Chairman ITRS2.0, Intel Fellow (1995-2012)
• Rebooting Computing: SRC Related Efforts (PDF, 1 MB) - William Joyner, Semiconductor Research Corporation
• Adapting to Thrive in a New Economy of Memory Abundance (PDF, 6 MB) - Kirk Bresniker, Hewlett Packard Labs Chief Architect, HPE Fellow
• Computing Performance: The N3XT 1,000X (PDF, 6 MB) - H.-S. Philip Wong, Department of Electrical Engineering, Stanford University
• Sensible Machine (PDF, 1 MB) - R. Stanley Williams, Senior Fellow, Hewlett Packard Labs
• The NNI and the Nanotechnology-Inspired Grand Challenge for Future Computing (PDF, 526 KB) - Lloyd Whitman, Assistant Director for Nanotechnology and Advanced Materials, White House Office of Science and Technology Policy
• UPSIDE/Cortical Processor Study (PDF, 10 MB) - Dr. Dan Hammerstrom, Program Manager, MTO, DARPA
• Neuromorphic Computing (PDF,1 MB) - David J. Mountain Senior Technical Director, Advanced Computing Systems Research Program, Laboratory for Physical Sciences
• 4 Presentations on Emerging Research Devices (PDF, 2 MB)
  • Pathways to Beyond CMOS Technology, Ian Young, Intel
  • Recent Progress in Steep Slope Transistors, Suman Datta, Penn State Univ.
  • Searching for a Millivolt Switch, Eli Yablonovitch, UC Berkeley
  • Emerging Memory Devices, Matthew Marinella, Sandia
• Acceleration of Neural Algorithms using Emerging Nanoelectronic Devices (PDF, 3 MB) - Matthew Marinella, Sandia
• The Dot-Product Engine (DPE): exploring high efficiency analog multiplication with memristorarrays (PDF, 2 MB) - John Paul Strachan, Hewlett Packard Labs