Digital Annealer Chip for Optimization Problems



There has been considerable attention in recent years to a superconducting quantum computer specially designed for solving combinatorial optimization problems using “quantum annealing”. But quantum annealing is a variant of simulated annealing, which is a well-known method for solving similar optimization problems using a classical digital computer. However, a standard microprocessor is not configured to solve such a problem efficiently, particularly when the data set becomes very large. A custom architecture with distributed memory and parallelism might be much faster.

With that in mind, Fujitsu developed a “digital annealing unit” (DAU), a custom CMOS chip with an architecture designed to address large-scale optimization problems more efficiently. This has been called “quantum-inspired”, but it is really a standard CMOS chip similar to an FPGA. The first-generation digital annealer chip was introduced last year, and was described in IEEE Spectrum. The second-generation chip, for somewhat larger data sets, was introduced recently.

Further information on the Fujitsu Digital Annealer is available from Fujitsu.

In comparison, D-Wave Systems is selling an alternative Quantum Annealer based around a superconducting chip cooled to -273 C. The latest generation of this quantum annealer is described in Communications of the ACM. While a quantum annealer may in principle solve problems much faster than a classical annealer, this advantage has not yet been convincingly demonstrated in real systems.

Whether these systems are quantum or “quantum-inspired”, they provide novel processors for future Big Data problems.