On-site AI Acceleration Challenge at ICCV 2019
We would like to bring awareness to the energy efficiency of AI accelerators and encourage researchers to innovate a new neural network architecture optimized for AI accelerators.
The challenge is to develop a realtime image classification model that runs on target HW platforms.
We have two tracks: DSP and FPGA. Cash awards will be given to the top three teams in each track. A participant (or a team) can submit to and win prizes in either or both categories.
Please visit the following websites to find more details.
Participants need to send their final submission by 9 AM on the 28th of October. We will announce the top three teams at the end of the Low-Power Computer Vision workshop at 5 PM.
- DSP track
- Jaeyoun Kim <jaeyounkim at google.com>
- Bo Chen <bochen at google.com>
- Achille Brighton <aib at google.com>
- Paul Roberts <pwroberts at google.com>
- FPGA track
- Naveen Purushotham <npurusho at xilinx.com>
- Hong Luo <hongluo at xilinx.com>
- Ashish Sirasao <asirasa at xilinx.com>