- New Graph Analytic Computer Being Developed - Funded by DARPA, massively parallel non-von-Neumann processor designed for Big Data applications.
- IRDS White Papers Featured - Tom Conte, co-chair of IRDS interviewed about future of semiconductor industry.
- NASA High Performance Fast Computing Challenge (HPFCC) - NASA has an open competition to speed up supercomputer simulations of computational fluid dynamics, with a deadline of June 29, and top prizes up to $55,000.
- Neuromorphic Chip Composes Music - IMEC in Belgium has designed a neuromorphic chip that can be trained using musical passages to compose music on its own.
- Low Power Image Recognition Challenge (LPIRC) - Registrations now open for the opportunity to compete for cash prizes. Limited travel grants available.
- Intel Universal Memory Technology - Intel has developed a new faster type of solid-state hard drive for data centers, based on a technology known as 3D XPoint.
- Google Tensor Processing Unit - TPU is ASIC chip designed for neural networks and machine learning, for use with TensorFlow software.
- Rambus Cryo DRAM - Rambus is collaborating with Microsoft researchers to develop new CMOS DRAM chips designed to operate at cryogenic temperatures of 90 K or below, for possible future use with cryogenic processors.
Modeling Vertical Tunnel FET
The Tunnel FET or TFET has been identified as a possible future elementary transistor for future fast low-power applications, surpassing CMOS performance. Min and Asbeck of the University of California at San Diego have simulated such a device in a novel vertical configuration, and report the results in the IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (JXCDC): “Compact Modeling of Distributed Effects in 2-D Vertical Tunnel FETs and Their Impact on DC and RF Performances.” Their results indicate an 800 GHz cutoff frequency for a 20 nm channel length, even including parasitics. This is highly encouraging for high-frequency analog and digital applications.
HPE Video: Moore’s Law is Dead - What Comes Next?
HPE sponsored Discover 2017 in Las Vegas, Nevada, June 5-8, 2017, exploring some novel technologies for the future of computing. This video includes presentations by Kirk Bresniker, John Paul Strachan, and Thomas Vaerenbergh on memory-driven digital computing, memristor-based analog computing, and silicon photonic computing.
Other videos from the same conference are available here.
- Rebooting Computing Video Overview
- IEEE Future Directions
- ICRC 2017 Call for Papers
- Computing in Science and Engineering on the End of Moore's Law
- IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (JXCDC)
- Arch2030 Workshop Report
- TTM 2016 Videos
- Workshop on Neuromorphic Computing
- Workshop on Beyond CMOS Technology
- Update on National Strategic Computing Initiative (NSCI)
- RC White Paper on Nanocomputers
- IEEE Computer Magazine on Rebooting Computing
- RC-ITRS Report on the Foundation of the New Computer Industry Beyond 2020