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Feature Article

Feature Article

Artificial Synapses for AI

IEEE Spectrum describes recent progress in the development of nanoscale memory cells that may be applied to variable artificial synapses for artificial neural networks, reported here.

This describes work at IBM Research on an electrochemical random-access memory cell, or ECRAM, where a gate drives lithium ions into or out of a tungsten trioxide channel, changing the channel resistance. What is required for neural network applications is a precise change in resistance, depending on the drive voltage, which is rapid and repeatedly reversible. This was presented at the International Electron Device Meeting in San Francisco in December. Other related work reported at IEDM included novel ferroelectric FETs (FeFET) from Purdue University, University of Notre Dame, and Samsung, which may also be applied to chips for neural networks.

Technology Spotlight

Technology Spotlight

Big Data Meets Big Compute

At the recent IEEE Industry Summit on the Future of Computing, held in Washington DC as part of IEEE Rebooting Computing Week, one of the keynote talks was by Alan Lee, Corporate Vice President, Head of Research, and Head of Deployed AI and Machine Learning Technologies at Advanced Micro Devices (AMD). The video of Mr. Lee’s talk is available here.

Mr. Lee spoke about “Big Data Meets Big Compute.” The volume of data being generated is rising exponentially, much faster than the growth in computing speed. Furthermore, the types of data are quite heterogeneous, as are the types of analysis, which will include artificial intelligence and machine learning (AI/ML). In order for data centers and supercomputers to handle this efficiently, they will need to incorporate a broad range of processors on the hardware level, as well as a complete range of algorithms and applications software. While custom solutions are most efficient in principle, the custom development effort is generally impractical. Mr. Lee recommended a modular approach at multiple levels in the stack. This could include chip-level modularity, whereby chiplets incorporating different processors (CPUs, GPUs, and FPGAs) and memory could be integrated in a semi-custom way on the same multi-chip module. Similarly, one could incorporate open-source software modules that could interface efficiently with the range of hardware. In this way, one can expect to obtain many of the benefits of custom design while minimizing some of the difficulties in programming and testing. The transition to this heterogeneous computing environment has already begun, and will likely continue for at least the next decade.

Videos of other Industry Summit 2018 invited talks are available from IEEE.tv.