• New faster parallel optimization algorithm implemented on FPGAs and GPUs - Toshiba sees applications to financial engineering.
• New project on DNA-based memory technology - Collaboration between Georgia Tech, Microsoft, University of Washington, and others.
• Princeton Quantum Initiative - New interdisciplinary program in quantum computing at Princeton University
• International Race to Demonstrate First Exascale Computer - China, US, EU, and Japan competing, with China’s entry possible in 2020.
• Neural Network Processor for Machine Learning - Intel announces new commercial AI chips for training and inference.
• Quantum Information Edge - New consortium on quantum computing led by US National Laboratories, with universities and industry.
• Update of National Strategic Computing Initiative - New Report from US Office of Science and Technology Policy addresses changes from original 2016 plan, including new emphasis on cybersecurity.
• Quantum Volume Explained - Metric promoted by IBM for comparing prototype quantum computing systems.
• Quantum Supremacy? - Google’s quantum tech milestone excites scientists and spurs rivals.
• Heterogeneous Integration Roadmap - Industry consortium SEMI announces new 15-year roadmap for electronic packaging and systems.
• Low-energy alternative to Bitcoin? - New financial algorithms are secure but much more energy-efficient than blockchains.

Accelerators for AI and HPC

Dr. Dejan Milojicic of Hewlett Packard Labs recently led a Virtual Roundtable Discussion on the present and future of accelerator chips for artificial intelligence (AI) and high-performance computing (HPC), which appeared in the February 2020 issue of IEEE Computer. The other participants were Paolo Faraboschi, Satoshi Matsuoki, and Avi Mendelson.

The central problem is how to deal with increasing complexity of heterogeneous hardware (CPUs, GPUs, FPGAs, ASICs, and multiple levels of memory) together with software that can efficiently use all of these resources to solve difficult computational problems. This is in addition to possible integration with new types of processors such as neuromorphic and quantum, which may become available in the next decade. All the participants agreed that continued improvements in performance will continue for the foreseeable future, both in small-scale (mobile) and large-scale (data center) computing, with continuing challenges along the way.

IRDS™ 2019 Highlights and Future Directions
Dr. Paolo Gargini, Chairman of IRDS™

IEEE Rebooting Computing Week was held in San Mateo, California, on 4-8 November 2019, and included a Workshop for the International Roadmap on Devices and Systems (IRDS™), the Industry Summit on the Future of Computing, the International Conference on Rebooting Computing (ICRC), and the Workshop on Quantum Computing. Videos of many of the presentations are available on IEEE.tv.

Dr. Gargini presented a brief overview of the past, present, and future of semiconductor roadmaps and IRDS™. Access the video on IEEE.tv.

While traditional 2D scaling is saturating, Dr. Gargini identified 3D power scaling for the period 2025-2040, together with new circuit architectures.

The most recent Roadmap is available on the IRDS™ website.

The new edition of the Roadmap is expected to be online by April.

• Rebooting Computing Video Overview
• IEEE Future Directions
• Computing in Science and Engineering on the End of Moore's Law
• IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (JXCDC)
• Arch2030 Workshop Report
• Workshop on Neuromorphic Computing
• Workshop on Beyond CMOS Technology
• Update on National Strategic Computing Initiative (NSCI)
• RC White Paper on Nanocomputers
• IEEE Computer Magazine on Rebooting Computing
• RC-ITRS Report on the Foundation of the New Computer Industry Beyond 2020