- IARPA program on Molecular Information Storage - New US government research program in nanoscale data storage and retrieval, including biological systems.
- Stochastic Computing in a Single Device - Minnesota researchers demonstrate magnetic tunnel junction which processes logic using random bits.
- Continuing progress internationally in moving toward exascale computers - Approaches to reduce power requirements include improved memory architectures and GPUs.
- Microsoft Announces Quantum Development Kit - Microsoft has publicly released a Quantum Development Kit, a software environment for developing applications of quantum computing.
- Green500 Drives Power Efficiency for Exascale - List of most power efficient supercomputers shows continued improvement in Gigaflops/Watt.
- In-Memory Computing Demonstrated using Phase-Change Memories - IBM researchers demonstrated accelerated machine learning in PCM memory array.
- Next-Generation Resistive RAM being developed - ReRAMs are fast non-volatile switches for memories and neural networks.
- Stanford Researchers Demonstrate New Ultrathin Semiconductors - HfSe2 and ZrSe2 semiconductors function in layers as thin as 3 atoms, and form passivating oxides.
- US Timeline for Exascale Computing - US Dept. of Energy labs plan demonstration of exascale system by 2023.
Transistor Options Beyond 3 nm
Fabrication of next-generation transistor devices is becoming more challenging, and several technologies are being explored to maintain improved performance at device nodes beyond 3 nm into the next decade and beyond. Some of these are variants of present advanced CMOS devices. These include, for example, gate-all-around (GAA) FETs, where the gate wraps entirely around nanowire Si channels. Other variations may include complementary FETs (CFETs) and negative capacitance FETs (NC-FETs). Some of these may incorporate novel materials, such as ferroelectric gates (such as hafnium oxide). This will also require innovations in lithography and interconnects. These technologies are projected for about 2025, but are unlikely to displace some of the larger nodes for many applications.
For further details, please see the article in Semiconductor Engineering here.
“International Roadmap for Devices and System: A New Way to Roadmap the Electronics Industry,” by Dr. Paolo Gargini, Chairman of IRDS.
Dr. Gargini is the Chairman of IRDS, and formerly its predecessor organization ITRS. Prior to this, he was a senior executive at Intel. In his talk, he reviewed the history of semiconductor roadmaps, and how this led to IRDS being affiliated with IEEE Rebooting Computing as part of the Industry Connections Program of the IEEE Standards Society. According to Dr. Gargini, Moore’s Law is not really ending, but it is evolving toward 3D Power Scaling, which will enable continued exponential improvement for the foreseeable future.
The talk by Dr. Gargini is available here.
Dr. Gargini spoke at the IEEE Industry Summit on the Future of Computing, held on Nov. 10, 2017 as part of Rebooting Computing week, and included invited talks from a wide range of leaders of industry, academia, and government. See here for the agenda.
Other talks from the Industry Summit and the co-located ICRC 2017 are available here.
- Rebooting Computing Video Overview
- IEEE Future Directions
- ICRC 2018 Call for Papers
- Computing in Science and Engineering on the End of Moore's Law
- IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (JXCDC)
- Arch2030 Workshop Report
- TTM 2016 Videos
- Workshop on Neuromorphic Computing
- Workshop on Beyond CMOS Technology
- Update on National Strategic Computing Initiative (NSCI)
- RC White Paper on Nanocomputers
- IEEE Computer Magazine on Rebooting Computing
- RC-ITRS Report on the Foundation of the New Computer Industry Beyond 2020