What's New - 2016
Toshiba Demonstrates Deep Learning using Time-Domain Neural Network - Low-power memory arrays used for mixed analog-digital image processing with high energy-efficiency and compact circuity, suitable for IoT devices.
Silicon Photonic Neurons Demonstrated - Researchers at Princeton University use lasers and integrated optical modulators to demonstrate neuron-like behavior that is scalable and faster than comparable electronic systems.
Moving beyond Moore’s Law with New Research Center at Georgia Tech - “Center for Research into Novel Computer Hierarchies”
New Standard for High-Performance Interconnects - Gen-Z Consortium sets new industry standard
Record short transistor gate demonstrated at Berkeley - 1-nm gate length with MoS2 channel
US National Nanotechnology Initiative issues new Strategic Plan - Includes “Nanotechnology-Inspired Grand Challenge for Future Computing”.
Focus Shifting to Photonics - Silicon photonic lasers and detectors are now being incorporated into ICs, for high-bandwidth communication both between and within chips.
GPU chip key to Low Power Image Recognition Challenge - Winners of recent RC-sponsored LPIRC contest used NVIDIA computing modules with graphics processing unit (GPU) chips.
IRDS™ Featured in IEEE Institute - The International Roadmap for Devices and Systems (IRDS™) is a new IEEE Standards Association initiative co-sponsored by Rebooting Computing.
Parallel Supercomputing - Panel at ISC16 conference discussed importance of parallel programming in future exascale computing systems.
KiloCore Parallel Computing Chip - Researchers at the University of California at Davis designed and tested a custom chip with 1000 processors operating in parallel, which can carry out more than 100 billion instructions per second while dissipating less than 1 W.
Quantum Manifesto in Europe - European Union research consortium plans to spend 1 billion euros over the next ten years on research into quantum computing, quantum communication, and other novel technologies.
The Boolean Logic Tax - Erik DeBenedictis points out that Boolean logic imposes an energy tax on computer circuit performance, and how this may be avoided.
Details about National Strategic Computer Initiative Slowly Emerging - White House inter-agency program on future computer technology is still being formulated.
Intel promotes new low-power device technologies - Tunneling transistors and spintronic devices reduce power compared to CMOS, which is more critical than increasing speed.
Continuing Progress in Neuromorphic Computing - Two European neuromorphic computing systems available to external users.
Nanoscale Spin-Wave Devices - Argonne National Lab reports fast, low-power memory and logic elements using nanoscale magnets.
HP and Memory-Abundant Computing - Hewlett Packard researchers presented novel approaches in computer architecture at IEEE Rebooting Computing Summit
RC and Internet of Things - RC Committee Member David Mountain talks about cybersecurity, IoT, and RC.
DRAM Defects - Local defects in memory chips may be responsible for a majority of errors in many computer systems, according to a recent study.
How Supercomputing Can Survive Beyond Moore's Law - An Interview with Erik DeBenedictis of RC and Sandia.
Nanotechnology Grand Challenge - Nanocomputers that can learn - RC is collaborating on a White Paper for a government-sponsored research program into small, low-power "Sensible Machines".
Graphene Key to High-Density, Energy-Efficient Memory Chips - Research at Stanford University focuses on using ultra-thin graphene to contact nanoscale elements with switchable resistance.
Los Alamos National Lab Orders Superconducting Quantum Computer - Quantum Annealing Processor from D-Wave Systems will be part of National Strategic Computing Initiative.
New Report on Energy-Efficient Computing - Based on NSF/SRC Workshop held in Arlington, VA, April 2015.
IEEE-RC Supports National Strategic Computing Initiative - New US inter-agency initiative in future High-Performance Computing and Emerging Electronic Technologies.